GridTrak Firmware Release 090C

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Downloads: 100
Change Set: 84647
Released: May 14, 2013
Updated: May 14, 2013 by ajstadlin
Dev status: Stable Help Icon

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Release Notes

Revision Notes
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*Stable Release May 14, 2013, FW Ver 090C*
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May 14, 2013, FW Ver 090C.0 Error Handler ISRs removed
Feb 12, 2013, FW Ver 090A.0 RB0=1+RB1=1>Text, RB1=0>PMU, RB0=1+(RB2+RB3)=GPS mode select
Nov 15, 2012, FW Ver 0908.0 Stand Alone factory default, 0908.g = GPS enabled factory default
Mar 23, 2012, FW ver 0907 GPS Mode Commands updated
Nov 11, 2011, FW Ver 9 GPS Integrated Implementation
Nov 10, 2011, FW Ver 8a GPS Time Data Mode, GPS to UNIX Time verified
Nov 06, 2011, FW Ver 8 RS232 Passthru mode for direct GPS-Host communications
Apr 22, 2011, FW Ver 7 GPS/PPS Signal Synchronization debugged
Feb 26, 2011, FW Ver 6 EPROM Configuration Block transfer routines added.
Feb 10, 2011, FW Ver 4 GridTrak Open Source PMU (GTosPMU) Version
Jan 22, 2011, FW Ver 1 Contributed to Open Source PMU projects
Mar 21, 2010, FW Ver 0 PPS and Interval Synchronized Frequency, Amplitude, and Phase output
Feb 14, 2010, FW Ver 0 PPS Signal Input Test on INT0

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Important Operation Notes
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1. When a PPS is not connected, connect the PPS header pin to ground.
2. When RB0 is high, the PMU will continously transmit data after resets using the RB1, RB2, and RB3 pin settings
When RB0 is low (grounded), the RB1, RB2, and RB3 pin settings are ignored.
A. Set RB1 high for Text mode. Set RB1 low for IEEE C37.118 mode
B. Set RB2 high for PPS mode, set RB3 high for GPS Time mode. Set RB2 and RB3 low for GPS Not Used mode.
C. You can set these high impedence input pins high by jumper wire to any +5Vdc pin
D. You can set these high impedence input pins low by jumper to any ground pin.

3. Probes connected directly to the INT1 and INT2 header pins may have adverse affects on phase measurements.
A. 0.1uF bypass capacitors may help

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